1. Field of the Invention
This invention relates to semiconductor fabrication, and more particularly to a method for fabricating a high-bias device.
2. Description of Related Art
As the size of semiconductor device is reduced, the channel length is accordingly reduced, resulting in a semiconductor device with a faster operational speed. However, even though the shorter channel length raises the operational speed, a channel length that is too short creates other serious problems. These problems are generally called the short channel effect and are described as follows. If the bias applied on the semiconductor device is kept constant but the channel length is shortened, according to a formula of "electric field (E-field)=bias/channel length", where E-field is measured in units of "V/m", the electrons within the channel gain more energy due to the stronger E-field so that the possibility of an electrical breakdown is higher.
In conventional methodology, a high bias MOS device usually employs an isolation layer and a drift region under the isolation layer to increase the distance between the source/drain regions and the gate. This allows the MOS device to work normally, even when a high bias is applied.
FIG. 1 is a cross-sectional view of a portion of a substrate, schematically illustrating a conventional structure of a high-bias device. In FIG. 1, a P-type semiconductor substrate 100 includes a field oxide (FOX) layer 102, an N-type source region 104, an N-type drain region 106, and a gate 110 on a gate oxide layer 101. The FOX layer 102 can increase the distance between the source region 104 and the drain region 106 so as to reduce the electric field in a channel region between them. In the substrate 100, an N-type doped region 108 is also included below the FOX layer 102 and a portion of the gate 110 to serve as a drift region of carriers. A P-type lightly doped region 112 below the source region 104 and a portion of the gate 110 is formed in the substrate 100 so as to increase an internal electric field at the channel region abound the source region 104. This can increase transconductance g.sub.m of the device to have a better operation speed.
In this conventional structure of the high-bias device, when it is operated at high bias input, a region around an end point 114 of the channel region close the drift region 108 has a stronger electric field due to its larger structure surface curvature. A potential crowding may occur. Since a created depletion region in the drift region 108 cannot endure this high electric field, an electric breakdown may occur on the channel region. A typical solution to solve this issue of electric breakdown is reducing the dopant concentration in the drift region 108. The depth of the depletion region therefore is increased so as to increase the electric breakdown voltage. However, since the dopant concentration of the drift region 108 is reduced, the current driving performance of the high-bias device is also reduced.